@ARTICLE {9737,
author={N. Lourenço and A. Canelas and R. Póvoa  and R. M. Martins and N. Horta},
doi={10.1016/j.vlsi.2014.07.002},
journal={Integration, The VLSI Journal},
title={Floorplan-aware analog IC sizing and optimization based on topological constraints},
year={2015},
month={January},
volume={48},
number={1},
pages={183-197},
ISSN={0167-9260}
}
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