Jorge Manuel Correia Guilherme

Jorge Guilherme

Academic position:	Assistant Professor
Joining date:	07-01-2004
Roles in IT:	Researcher
Thematic Line:	Basic Sciences and Enabling Technologies
Group:	Integrated Circuits - Lx

Email: Send Email
Address: IT – Lisboa
Instituto Superior Técnico - Torre Norte - Piso 10
Av. Rovisco Pais, 1
1049 - 001 Lisboa
Tel: +351 21 841 84 54
Fax: +351 21 841 84 72

Alternative Personal Web Page

https://www.orcid.org/0000-0001-9304-4974

SCHOLAR LinkedIn

Scientific Achievements

Degrees

PhD, Instituto Superior Técnico, 13-10-2003
MSc, Instituto Superior Técnico, 10-12-1994
Licenciatura, Instituto Superior Técnico, 10-11-1989

Affiliations

Instituto de Telecomunicações, 01-09-2004, Investigador
Instituto Politécnico de Tomar, 02-05-1999, Professor Adjunto
Instituto Politécnico de Tomar, 01-05-1996 - 01-05-1999, Assistente 1º Trienio
IEEE - Institute of Electrical and Electronics Engineers, 01-01-1987, Senior Member

Expertise Topics

Microelectronics, data converters A/D and D/A
Power electronics
Non-Linear data Converters

Academic Activities

9Lecture courses

Electronica I, Escola Superior de Tecnologia de Tomar, Lic. Eng. Electro. e de Computadores

Electronica II, Escola Superior de Tecnologia de Tomar, Lic. Engenharia Electr. e Computadores

Electronica Digital, Escola Superior de Tecnologia de Tomar, Lic. Engenharia Electr. e Computadores

Instrumentação e medidas electricas, Escola Superior de Tecnologia de Tomar, Lic. Engenharia Electr. e Computadores

Sensores e actuadores inteligentes, Escola Superior de Tecnologia de Tomar, Mestrado em Controlo e Electronica Industrial

Electronica Digital, Escola Superior de Tecnologia de Tomar, Mestrado em Controlo e Electronica Industrial

Electronica I, Escola Superior de Tecnologia de Tomar, Electronica I

Electronica de Instrumentação, Escola Superior de Tecnologia de Tomar, Instrumentation electronics

3Supervision of PhD theses

Publications

4Books

A. Canelas, J.G. Guilherme, N. Horta, Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies, Springer International Publishing, Switzerland AG, 2020,
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M. Mauro, J.G. Guilherme, N. Horta, Logarithmic Voltage-to-Time Converter for Analog-to-Digital Signal Conversion, Springer International Publishing AG Springer Nature, Cham Switzerland, 2019,
| BibTex
J.G. Guilherme, Architectures for High Dynamic Range CMOS Pipeline ADC conversion, Lambert Academic Publishing, Berlin, 2018,
| BibTex
M.B. Barros, J.G. Guilherme, N. Horta, Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques, Springer, Berlin, 2010,
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4Books Chapters

J.G. Guilherme, N. Horta, Automatic Layout Optimizations for Integrated MOSFET Power Stages, Chapter in, Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, Springer, Switzerland, 2015
C. Silva, J.G. Guilherme, N. Horta, Nonlinearities Behavioral Modeling and Analysis of Pipelined ADC Building Blocks, Chapter in, Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, Springer, Switzerland, 2015
A. Canelas, R. M. Martins, R. P. Póvoa, N. Lourenço, J.G. Guilherme, N. Horta, Enhancing an Automatic Analog IC Design Flow by using a Technology-Independent Module Generator, Chapter in, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino, IGI global, Medical Information Science Reference, 2014
J.G. Guilherme, J.C. Vital, Logarithmic Analog-to-Digital Converters, Chapter in, Deep-Submicron Telecom Data Converters, Angel Rodrigues Vazquez, Kluwer Academic, 2003

9Papers in Journals

A. Canelas, R. P. Póvoa, R. M. Martins, N. Lourenço, J.G. Guilherme, J.P.C Carvalho, N. Horta, FUZYE: A Fuzzy C-Means Analog IC Yield Optimization using Evolutionary-based Algorithms, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. n/a, No. n/a, pp. 1 - 13, November, 2018,
| Abstract | BibTex
J.G. Guilherme, J. Calvillo, R. P. Póvoa, N. Horta, Second-order compensation BGR with low TC and high performance for space applications, Integration, the VLSI Journal, Vol. 1, No. 1, pp. 1 - 10, July, 2018,
| Abstract | BibTex
M. Mauro, N. Horta, J.G. Guilherme, Logarithmic AD Converter with Selectable Transfer Characteristic, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 3, pp. 234 - 238, March, 2016,
| Abstract | BibTex
M. Mauro, N. Horta, J.G. Guilherme, A survey on nonlinear analog-to-digital converters, Integration, the VLSI Journal, Vol. 47, No. 1, pp. 12 - 22, January, 2014,
| Abstract | BibTex
DG Guilherme, J.G. Guilherme, N. Horta, Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion Based on an Evolutionary Optimization Kernel, Analog Integrated Circuits and Signal Processing, Vol. 73, No. 10.1007/s10470-011-9716-4, pp. 21 - 32, October, 2012,
| Abstract | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, Analog Circuits Optimization based on Evolutionary Computation Techniques, Integration, the VLSI Journal, Vol. 43, No. 1, pp. 136 - 155, January, 2010,
| Abstract | BibTex
J.G. Guilherme, A 2.5 mW 80 dB DR 36 dB SNDR 22 MS/s Logarithmic Pipeline ADC, IEEE Journal of Solid-State Circuits, Vol. 44, No. 10, pp. 2755 - 2765, October, 2009 | BibTex
A. Silva, J.G. Guilherme, N. Horta, Reconfigurable multi-mode sigma–delta modulator for 4G mobile terminals, Integration, the VLSI Journal, Vol. 42, No. 1, pp. 34 - 46, January, 2009,
| Abstract | Full text (PDF 1 MB) | BibTex
J.G. Guilherme, A CMOS Analog-Digital Audio Processor for a Portable Radiotelephone, IEEE Journal of Solid-State Circuits, Vol. 28, No. 5, pp. 560 - 568, May, 1993 | BibTex

63Papers in Conferences

R. Vieira, F. Passos, R. P. Póvoa, R. M. Martins, N. Horta, J.G. Guilherme, N. Lourenço, Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD SMACD, Sardinia, Italy, Vol., pp. -, June, 2022,
| Abstract | BibTex
N. Lourenço, F. Passos, R. Vieira, R. M. Martins, N. Horta, J.G. Guilherme, R. P. Póvoa, Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/ºC Temperature Coefficient, IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Villasimius, Italy, Vol., pp. -, June, 2022,
| Abstract | Full text (PDF 458 KBs) | BibTex
R. Vieira, F. Passos, A. Canelas, R. P. Póvoa, N. Lourenço, N. Horta, J.G. Guilherme, A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/ºC Stability for Space Applications, IEEE International Symp. on Circuits and Systems - ISCAS, Austin Texas, United States, May, 2022,
| Abstract | BibTex
J.G. Guilherme, R. P. Póvoa, N. Lourenço, N. Horta, PROMISE, PROgrammable MIxed Signal ASIC Electronics Framework, ESA International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications AMICSA, Amsterdam, Netherlands, May, 2021,
| Abstract | BibTex
J. Z. Zangpo, J.G. Guilherme, N. Horta, A 302 uW CMOS Temperature Sensor to compensate frequency drift for an oscillator, IEEE Annual Information Technology, Electronics and Mobile Communication Conference IEMECON, Jaipur, India, Vol. 1, pp. 1 - 4, March, 2019,
| Abstract | Full text (PDF 377 KBs) | BibTex
J.G. Guilherme, J. Z. Zangpo, R. P. Póvoa, N. Horta, An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations, IEEE International Conf. on Electronics, Circuits and Integrated Systems - ICECS, Bordeaux, France, Vol. 1, pp. 333 - 336, December, 2018,
| Abstract | Full text (PDF 1 MB) | BibTex
J.G. Guilherme, R. Granja, M. Mauro, N. Horta, 11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology, IEEE PhD. Research in Microelectronics and Electronics - PRIME, Prague, Czech Republic, July, 2018,
| Abstract | BibTex
J.G. Guilherme, A. Canelas, R. P. Póvoa, N. Lourenço, N. Horta, A 20 dB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Prague, Czech Republic, July, 2018,
| Abstract | BibTex
J. Calvillo, J.G. Guilherme, N. Horta, Design of a BGR suitable for The Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C, New Generation of Circuits and Systems NGCAS, Genova, Italy, September, 2017,
| Abstract | Full text (PDF 1 MB) | BibTex
J. Cachaço, N. Machado, N. Lourenço, J.G. Guilherme, N. Horta, Automatic Technology Migration of Analog IC Designs using Generic Cell Libraries, Design, Automation, and Test in Europe - DATE, Lausanne, Switzerland, Vol. N/A, pp. 1 - 4, March, 2017,
| Abstract | BibTex
A. Fitas, J.G. Guilherme, N. Horta, Design of a radiation-hardened curvature compensated bandgap reference circuit, IEEE PhD. Research in Microelectronics and Electronics - PRIME, Lisboa, Portugal, Vol. 1, pp. 1 - 4, June, 2016,
| Abstract | BibTex
C. Silva, J.G. Guilherme, N. Horta, SCALES: A high speed simulator tool for pipeline A/D converters, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Lisbon, Portugal, Vol. 1, pp. 1 - 4, June, 2016,
| Abstract | BibTex
M. Mauro, N. Horta, J.G. Guilherme, An 8bit Logarithmic AD Converter Using Cross- Coupled Inverters and a Time-to-Digital Converter, IEEE PhD. Research in Microelectronics and Electronics - PRIME, Lisbon, Portugal, Vol., pp. 1 - 4, June, 2016,
| Abstract | BibTex
J.G. Guilherme, N. Horta, Thermal-aware floorplanning and layout generation of MOSFET power stages, IEEE International Symp. on Circuits and Systems - ISCAS, Lisbon, Portugal, Vol. 1, pp. 1 - 4, May, 2015,
| Abstract | BibTex
B. Silva, J.G. Guilherme, N. Horta, A Rad-Hard DC-DC Converter Controller, IEEE International Conf. on Electronics, Circuits and Integrated Systems - ICECS, Marseille, France, Vol. 1, pp. 439 - 442, December, 2014,
| Abstract | BibTex
J.G. Guilherme, N. Horta, Automatic Layout Generation of Power MOSFET Transistors in Bulk CMOS, IEEE International Conf. on Electronics, Circuits and Integrated Systems - ICECS, marseille, France, Vol. 1, pp. 606 - 609, December, 2014,
| Abstract | BibTex
M. Mauro, N. Horta, J.G. Guilherme, Logarithmic AD Conversion Using Latched Comparators and a Time-to-Digital Converter, IEEE International Conf. on Electronics, Circuits and Integrated Systems - ICECS, Marseille, France, Vol., pp. 319 - 322, December, 2014,
| Abstract | BibTex
J.G. Guilherme, C. Silva, N. Horta, SCALES – A Behavioral Simulator for Pipelined Analog-to-Digital Converter Design, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Seville, Spain, Vol. 1, pp. 149 - 152, September, 2012,
| Abstract | BibTex
R. M. Martins, N. Lourenço, J.G. Guilherme, N. Horta, AIDA: Automated Analog IC Design Flow from Circuit Level to Layout, International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Seville, Spain, Vol. n/a, pp. 29 - 32, September, 2012,
| Abstract | BibTex
F.C. Cadete, DG Guilherme, J.G. Guilherme, N. Horta, F.C. Cadete, Overcurrent Detection Circuit for Integrated Class-D Amplifiers, European Conf. on Circuit Theory and Design, Linköping, Sweden, Vol. 1, pp. 410 - 413, September, 2011,
| Abstract | BibTex
P. Sousa, C. Duarte, M.B. Barros, J.G. Guilherme, N. Horta, Optimal OpAmp Sizing based on a Fuzzy-Genetic Kernel, Genetic and Evolutionary Computation Conf. - GECCO, Dublin, Ireland, July, 2011,
| Abstract | Full text (PDF 331 KBs) | BibTex
DG Guilherme, J.G. Guilherme, N. Horta, Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion, International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD, Gammarth, Tunisia, Vol. 1, pp. 1 - 4, October, 2010,
| Abstract | BibTex
DG Guilherme, J.G. Guilherme, N. Horta, An Automated Design Methodology for Audio Class-D Loop-Filters Optimized for THD+N, International Analog VLSI Workshop - AVLSIWS, Pavia, Italy, Vol. 1, pp. 47 - 51, September, 2010,
| Abstract | Full text (PDF 404 KBs) | BibTex
P. Sousa, C. Duarte, J.G. Guilherme, N. Horta, Enhancing Analog IC Design Optimization Kernels with Simple Fuzzy Models, European Conf. on Circuit Theory and Design, Antalya, Turkey, August, 2009,
| Abstract | Full text (PDF 340 KBs) | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, Analog Circuits Optimization based on Evolutionary Computation Techniques, Conf. on Telecommunications - ConfTele, Feira, Portugal, Vol. 1, pp. 1 - 1, April, 2009,
| Abstract | BibTex
J.G. Guilherme, A Low-cost EEG Stand-alone device for brain computer interface, Biomedical Engineering Conf. - BioMED, Porto, Portugal, Vol. 1, pp. 430 - 433, January, 2009 | BibTex
M. Mauro, C. Pires, J.G. Guilherme, N. Horta, Overview of Radiation Effects and Design Constraints off Fully Custom SMPS, IEEE Asia Pacific Conf. on Circuits and Systems - APCCAS, Macau, China, Vol. 1, pp. 372 - 375, December, 2008,
| Abstract | BibTex
N. Horta, M.B. Barros, J.G. Guilherme, Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques, International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD, Erfurt, Germany, October, 2008,
| Abstract | Full text (PDF 776 KBs) | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques, International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD, Erfurt, Germany, Vol., pp. 68 - 73, October, 2008,
| Abstract | BibTex
M. Figueira, J.G. Guilherme, N. Horta, Radiation Hardened SMPS, International Workshop on Analog and Mixed-Signal Integrated Circuits for Space Applications - AMICSA, Sintra, Portugal, September, 2008 | BibTex
M. Mauro, C. Pires, J.G. Guilherme, N. Horta, Radiation Hardened SMPS, Power Converter and Integrated Circuit Design Controller, International Workshop on Analog and Mixed-Signal Integrated Circuits for Space Applications - AMICSA, Cascais, Portugal, Vol. 1, pp. 1 - 8, August, 2008,
| Abstract | BibTex
N. Horta, A. Silva, J.G. Guilherme, A Reconfigurable A/D Converter for 4G Wireless, IEEE International Symp. on Circuits and Systems - ISCAS, Seattle, United States, Vol., pp. 924 - 927, May, 2008,
| Abstract | BibTex
M. Mauro, J.G. Guilherme, H.R. Ribeiro, Design of A Radiation Hardened DC/DC Converter For Space Applications, International Conf. on Electrical Engineering, Coimbra, Portugal, Vol., pp. 206 - 213, November, 2007,
| Abstract | BibTex
N. Horta, A. Silva, J.G. Guilherme, Design of a Multimode Reconfigurable Sigma-Delta Converter for 4G Wireless Receivers, European Conf. on Circuit Theory and Design, , Spain, August, 2007 | BibTex
N. Horta, M.B. Barros, J.G. Guilherme, An Evolutionary Optimization Kernel Using a Dynamic GA-SVM Model Applied to Analog IC Design, European Conf. on Circuit Theory and Design, , Spain, August, 2007 | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, An Evolutionary Optimization Kernel Using a Dynamic GA-SVM Model Applied to Analog IC Design, European Conf. on Circuit Theory and Design, Seville, Spain, Vol., pp. 33 - 35, August, 2007 | BibTex
R. Neves, J.G. Guilherme, N. Horta, Designing Reconfigurable Multi-Standard Analog Baseband Front-End for 4G Mobile Terminals: System Level Design, Conf. on Telecommunications - ConfTele, Peniche, Portugal, Vol. I, pp. 1 - 4, May, 2007 | BibTex
M. Mauro, H.R. Ribeiro, M.M. Martins, J.G. Guilherme, Switch Mode Power Supply Design Constraints for Space Applications, Conf. on Telecommunications - ConfTele, Peniche, Portugal, Vol., pp. 157 - 160, May, 2007,
| Abstract | BibTex
N. Horta, M.B. Barros, J.G. Guilherme, GA-SVM Feasibility Model and Optimization Kernel applied to Analog IC Design Automation, ACM Great Lakes VLSI - GLSVLSI), , Italy, March, 2007 | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, GA-SVM Feasibility Model and Optimization Kernel applied to Analog IC Design Automation, ACM Great Lakes VLSI - GLSVLSI), Stresa, Italy, Vol., pp. 469 - 472, March, 2007 | BibTex
N. Horta, M.B. Barros, J.G. Guilherme, GA-SVM Optimization Kernel applied to Analog IC Design Automation, IEEE International Conf. on Electronics, Circuits and Systems, , France, December, 2006 | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, GA-SVM Optimization Kernel applied to Analog IC Design Automation, IEEE International Conf. on Electronics, Circuits and Integrated Systems - ICECS, Nice, France, Vol., pp. 486 - 489, December, 2006 | BibTex
N. Lourenço, M.V. Vianello, J.G. Guilherme, N. Horta, LAYGEN - Automatic Layout Generation of Analog ICs from Hierarchical Template Descriptions, IEEE PhD. Research in Microelectronics and Electronics - PRIME, Otranto, Italy, Vol. 0, pp. 213 - 216, June, 2006,
| Abstract | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, An Evolutionary Optimization Kernel with Adaptive Parameters applied to Analog Circuit Design, International Symp. on Signals, Circuits and Systems, Iasi, Romania, Vol. 2, pp. 545 - 548, July, 2005 | BibTex
J.G. Guilherme, A Logarithmic Pipeline A/D Converter in 0.25mm CMOS Technology, Conf. on Telecommunications - ConfTele, Tomar, Portugal, Vol. 1, pp. 1 - 2, April, 2005 | BibTex
M.B. Barros, J.G. Guilherme, N. Horta, An Evolutionary Optimization Approach applied to Analog Circuit Design, Conf. on Telecommunications - ConfTele, Tomar, Portugal, April, 2005 | BibTex
N. Horta, M.B. Barros, G. Neves, J.G. Guilherme, A Distributed Enhanced Genetic Algorithm Kernel Applied to a Circuit/Level Optimization EDesign Environment, Conf. on Design of Circuits and Integrated Systems, Bordeaux, France, November, 2004 | BibTex
M.B. Barros, G. Neves, J.G. Guilherme, N. Horta, A Distributed Enhanced Genetic Algorithm Kernel Applied to a Circuit/Level Optimization EDesign Environmen, Conf. on Design of Circuits and Integrated Systems, Bordeaux, France, Vol., pp. 20 - 24, November, 2004 | BibTex
M.B. Barros, J. Silva, G. Neves, J.G. Guilherme, N. Horta, Enhanced Genetic Algorithm Kernel Applied to a Circuit-Level Optimization E-Design Environment, IEEE Conf. on Electronics, Circuits and System, Sharjah, United Arab Emirates, Vol., pp. 1046 - 1049, December, 2003 | BibTex
J.G. Guilherme, A CMOS Logarithmic Pipeline A/D Converter with a Dynamic Range of 80 dB, IEEE International Conf. on Electronics, Circuits and Systems, Dubrovnik, Croatia, Vol. 1, pp. 193 - 196, September, 2002 | BibTex
J.G. Guilherme, Design Considerations for High Resolution Pipeline ADCs in Digital CMOS Technology, IEEE International Conf. on Electronics, Circuits and Systems, Malta, Malta, Vol. 1, pp. 497 - 450, September, 2001 | BibTex
J.G. Guilherme, A True Logarithmic Analog-to-Digital Pipeline Converter with 1.5bit/stage and Digital Correction, IEEE International Conf. on Electronics, Circuits and Systems, Malta, Malta, Vol. 1, pp. 393 - 396, September, 2001 | BibTex
J.G. Guilherme, Performance Testing of Logarithmic Analog-to-Digital Converters, IMEKO TC-7 Symp., Lisbon, Portugal, Vol. 1, pp. 71 - 74, September, 2001 | BibTex
J.G. Guilherme, A Pipeline 15-bit, 10Msamples/s Analog-to-Digital Converter for ADSL Applications, IEEE International Symp. on Circuits and Systems - ISCAS, Sydney, Australia, Vol. 1, pp. 396 - 399, May, 2001 | BibTex
J.G. Guilherme, N. Horta, Symbolic Synthesis of Non-Linear Data Converters, IEEE International Conf. on Electronics, Circuits and Systems, Lisbon, Portugal, Vol. 3, pp. 219 - 222, September, 1998 | BibTex
J.G. Guilherme, Circuito Integrado de Potência para Regulação de Potência em Sistemas de Comunicações Móveis, Conf. on Telecommunications - ConfTele, Aveiro, Portugal, Vol. 1, pp. 447 - 450, April, 1997 | BibTex
J.G. Guilherme, Current-Mode Algorithmic Pipeline Analog-to-Digital Converter, IEEE Asia Pacific Conf. on ASIC's, Seoul, Korea, South, Vol. 1, pp. 401 - 404, November, 1996 | BibTex
J.G. Guilherme, New CMOS Logarithmic Two-Step Flash A/D Converters with Digital Error Correction, IEEE Midwest Symp. on Circuits and Systems, Rio de Janeiro, Brazil, Vol. 1, pp. 881 - 884, August, 1995 | BibTex
J.G. Guilherme, New CMOS Logarithmic A/D Converters Employing Pipeline and Algorithmic Architectures, IEEE International Symp. on Circuits and Systems - ISCAS, Seattle, United States, Vol. 1, pp. 529 - 532, May, 1995 | BibTex
J.G. Guilherme, A Logarithmic DAC for CMOS Technology, IEEE Asia Pacific Conf. on ASIC's, Taiwan, Taiwan, Vol. 1, pp. 490 - 493, December, 1994 | BibTex
J.G. Guilherme, A Monolithic Smart Switching Cell Targeted to a Wide Range of Low Power High Density Applications, IEEE Power Electronics Specialists Conf. - PESC, Taiwan, Taiwan, Vol. 1, pp. 457 - 462, June, 1994 | BibTex
J.G. Guilherme, Digitally-Controlled Analogue Signal Processing and Conversion Techniques Employing a Logarithmic Building Block, IEEE International Symp. on Circuits and Systems - ISCAS, London, United Kingdom, Vol. 5, pp. 377 - 380, May, 1994 | BibTex
J.G. Guilherme, Caracterização de componentes passivos e activos para o projecto de circuitos em microondas, USNC/URSI National Radio Science Meeting, Vigo, Spain, Vol. 1, pp. 35 - 39, September, 1990 | BibTex

1Non-refereed Publications

J.G. Guilherme, Critério de dimensionamento de Bobinas e Transformadores, Escola Superior Tecnologia de Tomar, February 1998,
| Abstract | Full text (PDF 34 KBs) | Other Resources

Patents

2Patents

M. Mauro, J.G. Guilherme, MÉTODO DE CONVERSÃO ANALÓGICO-DIGITAL COM CARACTERÍSTICA DE TRANSFERÊNCIA LOGARÍTMICA E CALIBRAÇÃO PARA SINAIS DIFERENCIAIS BIPOLARES, PT110172, National, Granted, 28-06-2017, Portugal,
| Abstract
J.G. Guilherme, M. Mauro, Conversor analógico-digital com característica de transferência logarítmica, PT107228, National, Granted, 11-10-2013,
| Abstract

Projects

Currently running projects2

Acronym	Name	Funding Agency	Start date	Ending date
ICG IPs	Analog IPs	Thales Alenia Space	01-01-2024	31-12-2025
PROMISE	PROgrammable MIxed Signal Electronics	EU/H2020	01-01-2020	31-12-2024

Closed Projects12

Acronym	Name	Funding Agency	Start date	Ending date
AIDA	AIDA – Automated P-Cell Generation based on Multi-Objective Optimization and Pareto Optimal Front Circuit Level Characterization	IT/LA	01-10-2011	01-12-2013
AIDA-C	AIDA-C: Analog IC Optimizer	Thales Alenia Space	01-10-2013	01-11-2021
AISMAD	AISMAD – Advanced Integrated Switched-Mode Audio Drivers	IT/LA	01-07-2011	01-12-2013
DISRUPTIVE	DISRUPTIVE - A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems	FCT	01-04-2013	01-12-2016
EVOLUTION	Exploring Evolutionary Computation to Enhance Analog IC Design Automation Methodologies	FCT/POSC	01-08-2005	31-07-2007
HEAD	HEAD – Integrated Class D Audio Amplifier with High Efficiency	IT/LA	01-11-2008	01-11-2010
LAYGEN	Automatic Layout Generation of Mixed-Signal ICs	IT/LA	01-04-2006	31-03-2008
OPERA	OPERA - Layout-Aware Analog IC Design Automation	IT/LA	01-03-2014	01-02-2016
PLASTIC	Fully Patterned all Plastic Integrated Circuits	IT/LA	01-07-2005	01-09-2007
SCALES	SCALES - Simulation Tool for Pipeline ADCs	Thales Alenia Space	01-04-2011	01-04-2014
Space-DCDC	Space-DCDC – DC-DC controller for space applications	IT/LA	01-10-2008	01-10-2010
uFlexBat	Batteryless energy supply system based on flexible organic photovoltaic cells	IT/LA	01-12-2016	30-06-2019

Other Scientific Achievements

4Awards

J. Calvillo, J.G. Guilherme, N. Horta, Silver Leaf Award, Silver Leaf Award for Design of a BGR suitable for The Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C in New Generation of Circuit and Systems Conference., 01-09-2017
C. Silva, J.G. Guilherme, SCALES: A high speed simulator tool for pipeline A/D converters, Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisbon, Portugal, Jun. 2016. (SMACD 2016 - 1st Prize Awarded in the Analog IC Design Automation Competition), 01-06-2016
R. M. Martins, N. Lourenço, S. R. Rodrigues, J.G. Guilherme, N. Horta, Honourable Mention on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), “AIDA: Automated Analog IC Design Flow from Circuit Level to Layout”, in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Seville, Spain, Sep. 2012., 01-09-2012
DG Guilherme, J.G. Guilherme, N. Horta, Best Student Paper Award, The International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD 2010 - best student paper award for the paper entitled ''Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion'', 01-10-2010

1Short Courses and Seminars

J.G. Guilherme, Ondas Electromagneticas e efeitos na Saude, Portugal, santarem, 02-2016

Other Contributions

1Editorial Committees

Associate Editor, AEU - International Journal of Electronics and Communications, 31-05-2017 - today

3Refereeing Journals

Journal of Circuits, Systems and Computers
2015, 1 review(s);
IEEE Transactions on Circuits and Systems I: Regular Papers
2015, 1 review(s);
Integration, the VLSI Journal
2015, 1 review(s);

3Refereeing Conferences

IEEE PhD. Research in Microelectronics and Electronics - PRIME
2018, 1 review(s); 2017, 1 review(s); 2016, 1 review(s);
IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD
2017, 1 review(s); 2016, 1 review(s);
IEEE International Symp. on Circuits and Systems - ISCAS
2024, 1 review(s); 2020, 1 review(s); 2018, 1 review(s); 2017, 1 review(s); 2016, 1 review(s); 2015, 1 review(s); 2014, 1 review(s); 2013, 1 review(s);

IT Member Profile

Jorge Guilherme

Scientific Achievements

As Co-supervisor

As Supervisor

As Co-supervisor

Currently running projects2

Closed Projects12