Creating and sharing knowledge for telecommunications
... Nuno Cavaco Gomes Horta

Senior Researcher

Nuno Horta

Academic position: Associate Professor
Joining date: 01-01-1999
Roles in IT: Senior Researcher
Scientific Area: Basic Sciences and Enabling Technologies
Group: Integrated Circuits - Lx

Email: Send Email
Address: IT – Lisboa
Instituto Superior Técnico - Torre Norte - Piso 10
Av. Rovisco Pais, 1
1049 - 001 Lisboa
Tel: +351 21 841 84 54
Fax: +351 21 841 84 72


Bio

Nuno Horta (S’89–M’97–SM’11) received the Licenciado, MSc, PhD and Habilitation degrees in electrical engineering from Instituto Superior Técnico (IST), University of Lisbon, Portugal, in 1989, 1992, 1997 and 2014, respectively. He is an Associate Professor at IST Electrical and Computer Engineering Department. He is a Senior Researcher at Instituto de Telecomunicações, where he is the head of the Integrated Circuits Group. He has supervised more than 90 post graduation works between MSc and PhD theses. He has authored or co-authored more than 150 publications as books, book chapters, international journals papers and conferences papers. He has also participated as researcher or coordinator in several National and European R&D projects. He was General Chair of AACD 2014, PRIME 2016 and SMACD 2016 and was member of the organizing and technical program committees of several other conferences, e.g., IEEE ISCAS, IEEE LASCAS, DATE, NGCAS, etc. He is Associated Editor of Integration, The VLSI Journal, from Elsevier, and usually acts as reviewer of several prestigious publications, e.g., IEEE TCAD, IEEE TEC, IEEE TCAS, ESWA, ASC, etc. His research interests are mainly in analog and mixed-signal IC design, analog IC design automation, soft computing and data science.


Scientific Achievements

  • Agregação, Instituto Superior Técnico, 09-09-2014
  • PhD, Instituto Superior Técnico, 24-07-1997
  • MSc, Instituto Superior Técnico, 30-11-1992
  • Licenciatura, Instituto Superior Técnico, 31-07-1989
  • Electronic Design Automation
  • Computer Architectures
  • Computational Intelligence
  • Computational Finance
  • ACM - Association for Computing Machinery, 01-11-2004, Senior Member
  • Instituto Superior Técnico, 01-03-1998, Associate Professor with Habilitation
  • Instituto de Telecomunicações, 01-09-1997, Senior Researcher
  • IEEE - Institute of Electrical and Electronics Engineers, 01-01-1991, Senior Member
  • Arquitectura de Computadores, , Mestrado em Engenharia Electrotécnica e de Computadores
  • Sistemas Digitais, , Mestrado em Engenharia Electrotécnica e de Computadores
  • ANALOG AND MIXED-SIGNAL IC DESIGN AUTOMATION , , PhD Elect e Computadores
  • Arquitecuras Avançadas de Computadores, , Mestrado em Engenharia Electrotécnica e de Computadores
  • Multi-Objective Optimization Using Evolutionary, Instituto Superior Técnico, PhD Program in Electrical and Computer Engineering
  • Analog IC Design Automation, Instituto Superior Técnico, PhD Program in Electrical and Computer Engineering
  • Computer Architecture, , Integrated Master Degree (MSc) in Electrical and Computer Engineering
  • Computer Architecture, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
  • Digital Systems, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
  • Advanced Computer Architectures, Instituto Superior Técnico, Integrated Master Degree (MSc) in Electrical and Computer Engineering
Supervision of theses
Co-Supervision of theses
  • J. Pinto, R. Neves, N. Horta, MULTI-OBJECTIVE OPTIMIZATION OF TRADING STRATEGIES USING GENETIC ALGORITHMS IN UNSTABLE ENVIRONMENTS, Chapter in, New Developments in Evolutionary Computation Research, Nova Publisher, Hauppauge, New York., 2015
  • J.G. Guilherme, N. Horta, Automatic Layout Optimizations for Integrated MOSFET Power Stages, Chapter in, Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, Springer, Switzerland, 2015
  • C. Silva, J.G. Guilherme, N. Horta, Nonlinearities Behavioral Modeling and Analysis of Pipelined ADC Building Blocks, Chapter in, Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, Springer, Switzerland, 2015
  • N. Leite Leite, R. Neves, N. Horta, F. Melício Melício, A.C.R. Rosa, Solving a Capacitated Exam Timetabling Problem Instance using a Bi-objective NSGA-II, Chapter in, Studies in Computational Intelligence, Kurosh Madani, António Dourado, Agostinho Rosa, Joaquim Filipe, Springer, Heidelberg, 2014
  • A. Canelas, R. M. Martins, R. P. Póvoa, N. Lourenço, J.G. Guilherme, N. Horta, Enhancing an Automatic Analog IC Design Flow by using a Technology-Independent Module Generator, Chapter in, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino, IGI global, Medical Information Science Reference, 2014
  • R. P. Póvoa, N. Lourenço, A. Canelas, R. M. Martins, N. Horta, Synthesis of LC-Oscillators using Rival Multi-Objective/Multi-Constraint Optimization Kernels, Chapter in, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino, IGI global, Medical Information Science Reference, 2014
  • N. Lourenço, R. M. Martins, M.B. Barros, N. Horta, Analog Circuit Design based on Robust POFs using an Enhanced MOEA with SVM Models, Chapter in, Analog/RF and Mixed-Signal Circuit Systematic Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Rafael Castro-Lopez, Springer, Heidelberg, 2013
  • P. Parracho Parracho, A. Canelas, R. Neves, N. Horta, Optimized Uptrend and Downtrend Pattern Templates for Financial Markets Trading Based on a GA Kernel, Chapter in, Financial Markets: Recent Developments, Emerging Practices and Future Prospects, Mohsen Bahmani-Oskooee and Sahar Bahmani, Nova Publisher, 2013
  • M. Mauro, N. Horta, AMS Synthesis Using Symbolic Methods, Chapter in, Design of Analog Circuits through Symbolic Analysis, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Francisco V. Fernández, Bentham Science Publishers, 2012
  • N. Horta, C.A. Leme, J.E. Franca, Automated High Level Synthesis of Data Conversion Systems, Chapter in, ANALOGUE-DIGITAL ASICs circuit techniques, design tools and applications, IEE - Peter Peregrinus, IEE Press, 1991

Currently running projects1

Acronym Name Funding Agency Start date Ending date
AIDA-C AIDA-C: Analog IC Optimizer Thales Alenia Space 01-10-2013 01-11-2021

Closed Projects11

Acronym Name Funding Agency Start date Ending date
AIDA AIDA – Automated P-Cell Generation based on Multi-Objective Optimization and Pareto Optimal Front Circuit Level Characterization IT/LA 01-10-2011 01-12-2013
AISMAD AISMAD – Advanced Integrated Switched-Mode Audio Drivers IT/LA 01-07-2011 01-12-2013
DISRUPTIVE DISRUPTIVE - A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems FCT 01-04-2013 01-12-2016
EVOLUTION Exploring Evolutionary Computation to Enhance Analog IC Design Automation Methodologies FCT/POSC 01-08-2005 31-07-2007
HEAD HEAD – Integrated Class D Audio Amplifier with High Efficiency IT/LA 01-11-2008 01-11-2010
LAYGEN Automatic Layout Generation of Mixed-Signal ICs IT/LA 01-04-2006 31-03-2008
OPERA OPERA - Layout-Aware Analog IC Design Automation IT/LA 01-03-2014 01-02-2016
PLASTIC Fully Patterned all Plastic Integrated Circuits IT/LA 01-07-2005 01-09-2007
SCALES SCALES - Simulation Tool for Pipeline ADCs Thales Alenia Space 01-04-2011 01-04-2014
Space-DCDC Space-DCDC – DC-DC controller for space applications IT/LA 01-10-2008 01-10-2010
SPEED Low Power Ultra-High Speed Analogue-to-Digital Converter for Ultra-Wideband Wireless Communications FCT/PTDC 01-09-2007 01-03-2011
  • J. Calvillo, J.G. Guilherme, N. Horta, Silver Leaf Award, Silver Leaf Award for Design of a BGR suitable for The Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C in New Generation of Circuit and Systems Conference., 01-09-2017
  • R. M. Martins, A. Canelas, N. Lourenço, N. Horta, Best Paper Award at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), "On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies," , in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisboa, Portugal, June 2016., 01-06-2016
  • R. M. Martins, N. Lourenço, A. Canelas, R. P. Póvoa, N. Horta, 1st Ranked on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), "AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation" at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Istanbul, Turkey., 01-09-2015
  • R. M. Martins, N. Lourenço, N. Horta, Silver Leaf Best Paper Award at IEEE Conference on PhD Research in Microelectronics and Electronics (PRIME), “Analog IC Placement using Absolute Coordinates and a Hierarchical Combination of Pareto Optimal Fronts”, in IEEE Conference on PhD Research in Microelectronics and Electronics (PRIME), Glasgow, Scotland, June 2015., 01-07-2015
  • R. P. Póvoa, N. Lourenço, N. Horta, JG Goes, Nominee for Best Student Paper Award at IEEE International Symp. on Circuits and Systems (ISCAS), A Voltage-Combiners-Biased Amplifier with Enhanced Gain and Speed using Current Starving, Lisboa, Portugal., 01-05-2015
  • R. P. Póvoa, R. Lourenço Lourenço, N. Lourenço, A. Canelas, R. M. Martins, N. Horta, Best Student Paper Award Runner-Up at IEEE International Symp. on Circuits and Systems (ISCAS), LC-VCO Automatic Synthesis Using Multi-Objective Evolutionary Techniques, Melbourne, Australia., 01-06-2014
  • R. M. Martins, N. Lourenço, S. R. Rodrigues, J.G. Guilherme, N. Horta, Honourable Mention on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), “AIDA: Automated Analog IC Design Flow from Circuit Level to Layout”, in International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Seville, Spain, Sep. 2012., 01-09-2012
  • DG Guilherme, J.G. Guilherme, N. Horta, Best Student Paper Award, The International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD 2010 - best student paper award for the paper entitled ''Automatic Topology Selection and Sizing of Class-D Loop-Filters for Minimizing Distortion'', 01-10-2010
  • N. Horta, "Behavioral Pattern Detection Using Compact and Fast Methods" by Nuno Homem, PhD Thesis Jury, 01-10-2011
  • N. Horta, ''Time-Domain Optimizationof Amplifiers based on Distributed Geneti Algorothms'' by Rui Tavares, PhD Thesis Jury, 01-12-2010
  • N. Horta, "Order Reduction of Parameterized Structured EM-based Linear Models" by Jorge Vilhena, PhD Thesis Jury, 01-09-2010
  • IEEE PhD. Research in Microelectronics and Electronics - PRIME, Scientific Committee, 2018
  • International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Technical Programme Chairman, 2018
  • Design, Automation, and Test in Europe - DATE, Technical Programme Committee, 2018
  • IEEE PhD. Research in Microelectronics and Electronics - PRIME, Organizing Committee, 2017
  • International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Technical Programme Chairman, 2017
  • Design, Automation, and Test in Europe - DATE, Technical Programme Committee, 2017
  • IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Conference Chairman, 2016
  • IEEE PhD. Research in Microelectronics and Electronics - PRIME, Conference Chairman, 2016
  • Design, Automation, and Test in Europe - DATE, Technical Programme Committee, 2016
  • Design, Automation, and Test in Europe - DATE, Technical Programme Committee, 2015
  • IEEE International Symp. on Circuits and Systems - ISCAS, Organizing Committee, 2015
  • International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Scientific Committee, 2012
  • International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD, Scientific Committee, 2010
  • Design, Automation and Test in Europe Conf., Scientific Committee, 2008
  • International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design - SM2ACD, Scientific Committee, 2008
  • Design Automation and Test in Europe, DATE 2007, Technical Programme Committee, 2007
  • XATA2007 — XML: Aplicações e Tecnologias Associadas, Scientific Committee, 2007
  • Design Automation and Test in Europe, DATE 2006, Technical Programme Committee, 2006
  • XATA2006 — XML: Aplicações e Tecnologias Associadas, Scientific Committee, 2006
  • International Workshop on Symbolic Methods and Applications to Circuit Design - SMACD, Scientific Committee, 2006
  • 5th Conference on Telecommunications, Technical Programme Committee, 2005
  • Design Automation and Test in Europe, DATE 2005, Technical Programme Committee, 2005
  • 8th International Workshop on Symbolic Methods and Applications to Circuit Design, SMACD 2004, Scientific Committee, 2004
  • Design Automation and Test in Europe, DATE 2004, Scientific Committee, 2004
  • Design Automation and Test in Europe, DATE 2003, Scientific Committee, 2003
  • 7th International Workshop on Symbolic Methods and Applications to Circuit Design, SMACD 2002, Scientific Committee, 2002
  • Design Automation and Test in Europe, DATE 2002, Scientific Committee, 2002
  • Workshop on System Design Automation, SDA 2000, Technical Programme Committee, 2000
  • 6th International Workshop on Symbolic Methods and Applications to Circuit Design, SMACD 2000, Conference Chairman, 2000