Creating and sharing knowledge for telecommunications
... Ricardo Filipe Sereno Póvoa

Researcher

Ricardo Póvoa

Academic position: Post. Doc.
Joining date: 01-01-2012
Roles in IT: Researcher
Scientific Area: Basic Sciences and Enabling Technologies
Group: Integrated Circuits - Lx

Email: Send Email
Address: IT – Lisboa
Instituto Superior Técnico - Torre Norte - Piso 10
Av. Rovisco Pais, 1
1049 - 001 Lisboa
Tel: +351 21 841 84 54
Fax: +351 21 841 84 72


Scientific Achievements

  • PhD, Instituto Superior Técnico, 16-04-2018
  • MSc, Instituto Superior Técnico, 20-06-2013
  • Licenciatura, Instituto Superior Técnico, 21-07-2010
  • Integrated Circuits Design
  • Electronic Design Automation
  • A. Canelas, R. M. Martins, R. P. Póvoa, N. Lourenço, J.G. Guilherme, N. Horta, Enhancing an Automatic Analog IC Design Flow by using a Technology-Independent Module Generator, Chapter in, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino, IGI global, Medical Information Science Reference, 2014
  • R. P. Póvoa, N. Lourenço, A. Canelas, R. M. Martins, N. Horta, Synthesis of LC-Oscillators using Rival Multi-Objective/Multi-Constraint Optimization Kernels, Chapter in, Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino, IGI global, Medical Information Science Reference, 2014

Currently running projects1

Acronym Name Funding Agency Start date Ending date
AIDA-C AIDA-C: Analog IC Optimizer Thales Alenia Space 01-10-2013 01-11-2021

Closed Projects1

Acronym Name Funding Agency Start date Ending date
DISRUPTIVE DISRUPTIVE - A Paradigm Shift in the Design of Analog and Mixed-Signal Nanoelectronic Circuits and Systems FCT 01-04-2013 01-12-2016
  • R. M. Martins, N. Lourenço, A. Canelas, R. P. Póvoa, N. Horta, 1st Ranked on “Design Automation Competition” at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), "AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation" at International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Istanbul, Turkey., 01-09-2015
  • R. P. Póvoa, N. Lourenço, N. Horta, JG Goes, Nominee for Best Student Paper Award at IEEE International Symp. on Circuits and Systems (ISCAS), A Voltage-Combiners-Biased Amplifier with Enhanced Gain and Speed using Current Starving, Lisboa, Portugal., 01-05-2015
  • R. P. Póvoa, R. Lourenço Lourenço, N. Lourenço, A. Canelas, R. M. Martins, N. Horta, Best Student Paper Award Runner-Up at IEEE International Symp. on Circuits and Systems (ISCAS), LC-VCO Automatic Synthesis Using Multi-Objective Evolutionary Techniques, Melbourne, Australia., 01-06-2014
  • IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Conference co-chair, 2016