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| PROJECT: | DSRC 5,9GHz | |||||
| ACRONYM: | HEADWAY | |||||
| MAIN OBJECTIVE: | Develop a DSCR 5,9GHz (Layers PHY & MAC) transceiver, FPGA based. | |||||
| Reference: | Po 1011 | |||||
| Funding: | BIT/BRISA | |||||
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| Team: | João Nuno Pimentel da Silva Matos, Arnaldo da Silva Rodrigues de Oliveira, Nuno Balula de Almeida, Tiago Miguel Valente Varum, Joaquim José de Castro Ferreira, Nelson Cardoso, Manuel Ventura | |||||
| Groups: | ||||||
| Partners: | ||||||
| Local Coordinator: | João Nuno Pimentel da Silva Matos | |||||
| Links: | Internal Page |
This project falls under the following United Nations Strategic Development Goals (SDGs):