In this context, the project has two principal objectives: i) to analyze feedback-based CD mechanisms for CMOS systems, developing formal models for these techniques. These models should provide indication on performance bounds of given clock distribution architectures, given technology characteristics, clock network elements, and global circuit characteristics. ii) to develop new clock network devices (e.g. DLLs, repeaters), based on concepts of high speed distributed filtering and amplifications. This will achieved by expanding concepts already developed by this team both in this and in other fields of application.
After successful conclusion the project should have demonstrated (inside the existing development constraints, i.e., non-commercial circuits) the validity and limitations of the clock distribution models, specially associated with the novel devices developed in the project. For that, the project will develop a clock distribution system with novel systems for discrete-time control of clock phase and novel clock repeater strategies. The experimental circuits developed will be implemented through the Europractice program.
|Start Date: 01-07-2004|
|End Date: 01-07-2006|
|Team: Rui Luis Andrade Aguiar, Luís Alves, Mónica Jorge Carvalho de Figueiredo|
|Groups: Integrated Circuits – Av|
|Partners: Uni Aveiro|
|Local Coordinator: Rui Luis Andrade Aguiar|