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Multi-Port Multi-Terminal Analog Router based on an Evolutionary Optimization Kernel

Martins, R. M. ; Lourenço, N. ; Canelas, A. ; Horta, N.

Multi-Port Multi-Terminal Analog Router based on an Evolutionary Optimization Kernel, Proc IEEE Congress on Evolutionary Computation - CEC, Cancún, Mexico, Vol. n/a, pp. 2789 - 2796, June, 2013.

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In the state-of-the-art on analog integrated circuit
(IC) automatic routing approaches it is assumed that each
terminal has only one port that can be routed, however, in
practice a device usually contains multiple electrically-equivalent
locations where the connection can be made, multi-port
terminals, which are not properly explored. This paper describes
an innovative evolutionary approach with multi-port multiterminal
(MP/MT) nets for analog IC automatic routing. The
netlist and the multi-port terminals are modeled in a Group-
Steiner problem that is solved by the Global Router, to obtain the
terminal-to-terminal connectivity, and then, for the detailed
routing, an optimization kernel is used, namely, an enhanced
version of the multi-objective evolutionary algorithm NSGA-II.
The Router starts by a single-net procedure, and culminates in a
process where all nets are optimized simultaneously. The
technology design rules are verified during the evolutionary
generation using an in-loop built-in layout evaluation procedure.
The automatic routing generation is detailed, and demonstrated
for the generation of the layout of a typical analog circuit, for the
UMC 130nm design process. The automatically generated layouts
are validated using the industrial grade Calibre® tool and the
performances of the extracted circuits are compared with the
ones achieved in the circuit-level design.