Exploring Design Tradeoffs in Analog IC Placement with Current-Flow & Current-Density Considerations
Martins, R. M.
Póvoa , R.
Exploring Design Tradeoffs in Analog IC Placement with Current-Flow & Current-Density Considerations, Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Istanbul, Turkey, Vol. n/a, pp. n/a - n/a, September, 2015.
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In this paper, the concept of hierarchical multiobjective
optimization (MOO) is applied to analog integrated
circuit (IC) placement automation, where current-flow and
current-density considerations are taken to improve the
reliability and, reduce the routing-induced parasitics of the
circuit post-layout. The current-flow constraints are satisfied by
forcing a monotonic routing directly in an absolute placement
representation, while the impact of current-intensive
interconnects is mitigated with the electromigration (EM)-aware
optimization of the wiring topology (WT) for all nets of the
circuit. The problem’s complexity is reduced using the hierarchy
in the circuit’s partitions, combining, bottom-up, Pareto optimal
fronts (POFs) of placements that explore the tradeoffs between
the design objectives. The approach is demonstrated with postlayout
results in an analog circuit structure for the UMC 130nm