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AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation

Martins, R. M. ; Lourenço, N. ; Canelas, A. ; Póvoa , R. P. ; Horta, N.

AIDA: Robust Layout-Aware Synthesis of Analog ICs including Sizing and Layout Generation, Proc International Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design - SMACD, Istanbul, Turkey, Vol. n/a, pp. n/a - n/a, September, 2015.

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This paper presents AIDA 2015, the newest version
of AIDA, an analog integrated circuit design automation
environment, which implements a design flow from a circuit-level
specification to physical layout description. AIDA results from
the integration of two in-house tools, namely, AIDA-C and
AIDA-L. AIDA-C consists of an innovative layout-aware
optimization-based methodology for automatic sizing of analog
ICs. AIDA-L, the layout generator, implements a fully automated
layout generation methodology. AIDA-L provides two alternative
floorplanners, a template-based and an optimization-based. The
placed modules, whose layouts are spawned by the in-house
module generator, are fed together with the node electriccurrents
to the electromigration-aware multi-port Router that
finalizes the layout. Finally, the AIDA environment,, is demonstrated for analog IC design, sizing
and layout generation, using state-of-the-art technologies, and
validated by industrial simulators and analysis tools, such as,