Creating and sharing knowledge for telecommunications

LAYGEN II—Automatic Layout Generation of Analog Integrated Circuits

Martins, R. M. ; Lourenço, N. ; Horta, N.

IEEE Transactions on Computer-Aided Design Vol. 32, Nº 11, pp. 1641 - 1654, November, 2013.

ISSN (print): 0278-0070
ISSN (online):

Journal Impact Factor: 1,181 (in 2015)

Digital Object Identifier: 10.1109/TCAD.2013.2269050

Abstract
This paper describes an innovative design automation
tool, LAYGEN II, for analog integrated circuit (IC) layout
generation based on template descriptions and on evolutionary
computation techniques. LAYGEN II was developed giving special
emphasis to the reusability of expert knowledge and to the
efficiency of retargeting operations. The designer specifies the
sized circuit-level structure, the required technology and also,
the layout template consisting of technology and specification
independent high-level layout guidelines. For placement, the
topological relations present in the template are extracted to a
nonslicing B*-tree layout representation, and the tool automatically
merges devices and improves the floorplan quality. For
routing an optimization kernel consisting of a tailored version of
the multiobjective multiconstraint evolutionary algorithm NSGAII
is used. The Router optimizes all nets simultaneously and
uses a built-in engine to evaluate each of the layout solutions.
The automatic layout generation is demonstrated here using the
LAYGEN II tool for typical analog circuit structures, and the
results in GDSII format were validated using the industrial grade
verification tool Calibre®.